Synopsys Workshop

Synopsys Workshop: Foundry PDK-Driven Silicon Photonic Integrated Circuit Design for Aerospace & Defense, Datacom and High-Performance Computing Applications

When: Tuesday, April 4, 8:00am-12:00pm
Where: Crowne Plaza Crystal City – Washington, DC
1480 Crystal Drive, Arlington, VA

is required,
space is limited.

What will I learn:

The workshop will prepare you with the knowledge of the complete E-O design flow for PICs so that you can manage a design team at your organization and/or prepare for the multi-project wafer (MPW) runs with the supported foundries. No prior knowledge of PIC design is required although an understanding of EDA basics and practices can help.

Who Should Attend:

  • Aerospace & Defense: Project Managers, Principal Investigators, Members of the photonic and electronic Systems and circuit design teams
  • Telecom, High-Performance Computing, Datacom and Sensors: Technical Leaders, Transceivers and co-packaged optics (CPO) teams, Simulation and verification professionals
  • Academia: R&D Scientists, Government and industry co-funded project managers

Why learn about PICs?

The time for large-scale, reliable photonic integrated circuits (PICs) has finally arrived. The segments PICs find compelling use-cases include aerospace & defense, sensors, data centers, high-performance computing (AI/ML), health and consumer wearables. Governments, academia and industry are all onboard to transfer the knowledge gained from decades of manufacturing experience in electronic integrated circuits to photonic integration. In addition to the favorable economics from higher energy efficiency, smaller footprint and lower cost, photonic integration is recognized as essential to national security.

What will the workshop cover:

  • Introduction to schematic-driven layout (SDL) design flow for PICs using commercial foundry iPDK   
    • Schematic Entry in Synopsys OptoCompiler
    • Testbench setup and pre-layout simulation
    • Layout: Overview of productivity enhancing features/automation and Back-annotation
    • Post-layout simulation: Introduction to Monte Carlo and Corner Analyses
    • Verification: Design Rule Check, Layout vs. Schematic
  • Custom Photonics: Active and Passive Photonic Component Design for Manufacturing
    • Setting up a device design in Photonic Device Compiler (RSoft Device Design Tools)
    • Choice of BPM, FDTD, RCWA, FEM
    • Using Custom PDK Utility for generating cells, views and parametric simulation data
    • Using Custom PDK in the SDL flow (OptoCompiler)
  • Introduction to E-O Co-Design
    • Schematic Entry in Synopsys OptoCompiler
    • Testbench Setup for electrical and photonic subcircuits
    • Visualization of simulation results and post-processing options


Luis Orbe 
Customer Support Coordinator
Synopsys, Inc 

Luis Orbe has multiple years of experience in photonic integrated circuit (PIC) design, customer enablement, and training program coordination. ​

He received his PhD and MSc degrees in Engineering Management and Logistics and Advanced Electronic Systems from Universidad Carlos III de Madrid, where he specialized in PIC design for mid-infrared sensing and monolithic integration. He has participated in European PIC design and education initiatives, authored or co-authored 20 papers in the field of photonics, and holds a patent for a photonic multiplexer/demultiplexer design.

Chenglin Xu
RSoft Photonic Device Tools Product Manager
Synopsys, Inc  

Chenglin Xu is currently the Product Manager at Synopsys for RSoft Photonic Device Tools.

Before joining Synopsys, he was an Optical Design Engineer of JDS (95-96), a Research Assistant Professor of University of Waterloo (97-99), and the Chief Scientist and co-founder of Apollo Photonics, Inc. (97-04), a Professor of Shandong University (05-06) and a Senior Application Engineer of RSoft Design Group (07-12), which was acquired by Synopsys in 2012.

Chenglin Xu earned his BS and MS degrees in Optical Engineering from Tianjin University, Tianjin, China in 1985 and 1988, and Ph.D. degree in Electrical Engineering from University of Waterloo, Canada in 1994.

TungYu Su
Senior Applications Engineer
Synopsys, Inc 

TungYu Su is currently the senior application engineer at Synopsys Photonic Solutions. He has joined this optical/photonics area for more than 10 years and has been focusing on the applications of the circuit level design, simulation, layout implementation and physical verification of Photonic Integrated Circuits (PICs), device-level design, validation and optimization for photonic devices.

TungYu earned his BS and MS in the department of Physics in National Taiwan University, Taipei, Taiwan in 2010 and 2012.